Hill, California - December 20, 2004. OEA International, Inc. (OEA)
introduces DP-PLAN[TM], a next-generation dynamic power planning solution
for pre-design of core power networks on complex hierarchical chip designs.
DP-PLAN is the only tool on the market to include full on-chip inductance
coupling in the simulation of the network. At the floorplanning stage,
DP-PLAN is used to help avoid IR drop problems and provide effective
impedance mapping for detailed critical net simulations. DP-PLAN's ease-of-use in setting up the
power net design, fast accurate extraction, and network simulation
performance enables designers to easily identify the power integrity issues
early in design process.
DP-PLAN features are:
object-oriented based floorplanning allows easy integration with any
floorplanner. DP-PLAN includes advanced placement and rail planning features
such as full hierarchical block placement, support for multiple power net
domains combined in the same simulation, simple definitions of rails and
placements, automatic rail hook-ups to nearest same net metal in all
directions, automatic via insertion per user rules and full flip-chip bump
uses the unparalleled OEA NET-AN extraction engine with the advanced
'Cheetah' 3D field solver technology for the most accurate parasitic
extraction available. NET-AN, the fastest 3D solver available, quickly
extracts huge power networks including inductance and mutual inductance.
includes the new 'Panther' Spice simulator for fast and accurate solutions
of large coupled networks. Panther is the only Spice engine capable of
solving large inductively coupled networks which include thousands of mutual
inductors. Panther is run for both transient and AC simulation modes. This
allows the user to not only simulate dynamic voltage variations but also to
map effective impedance to all areas on the chip. Effective impedance
simulation allows the user to find clock and critical path problems due to
voltage supply impedance issues.
violation reports, DP-PLAN gives a graphical report of the time-based
voltage patterns and violation areas. Also, the user is able to plot an
effective impedance mapping of the chip to find out areas where the supply
path is marginal for high speed circuits.
"Dynamic Core power planning is a major
challenge from the perspectives of both design and verification. Other
existing tools are limited by their lack of speed, ease-of-use, and
inability to accurately process the inductive effects of the power network
properly. Our methodology is based on the true electrical model of the power
grid which includes both inductance and mutual inductance, both of which can
have a significant impact on the networks performance, " said Ersed Akcasu,
President of OEA International, Inc.
Pricing and Availability
DP-PLAN Dynamic Power Planning tool is available immediately starting at
$150,000 for a time-based license.
Other Power Net Tools
International also has several other Power Network design and analysis tools
P-GRID - 3D Power Network Analysis for static voltage drop and
P-PLAN - A hierarchical floor planning tool for static power planning.
Designer - An IO Ring analysis tool for simulating simultaneous switching
noise and ground bounce.
About OEA International
OEA International, Inc. was formed in 1988 to
address demanding IC extraction problems. The company has secured the
extraction accuracy leadership role by working closely with major IC and
system companies using the most modern process technologies available.
Through these relationships, the company has applied it 3D extraction
expertise to provide a family of critical net design tools, signal integrity
analysis tools, and RF component design tools.
RF/analog designers also have available RF-PASS[TM],
a passive component analysis tool which ensures the most accurate models for
on-chip resistors, capacitors, coil transformers and wind up/down inductors.
For additional information call (408) 778-6747, or visit OEA online at
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