The Gold Standard for Accurate Parasitic Extraction and Signal Integrity Solutions



For more information, contact:

Jerry Tallinger
OEA International, Inc.


OEA International Hosts Seminar on Design and Extraction of Interconnects for High Speed ICs

Morgan Hill, CA - March 5, 2002 - Designers are now faced with the additional burden of precisely modeling their interconnects. This problem is compounded by the fact that most
existing design tools do not properly model interconnects at higher frequencies and there is precious little related design experience available in the

During this intensive one-day seminar, you will learn more about: 

 -  On-chip Inductance Issues
 -  Signal Integrity and Crosstalk
 -  Extraction peculiarities for DSM and Copper technologies
 -  Optimizing I/O placement and Power/Ground nets
 -  Design of RF Passive Components

Seminar agenda will include the following technical presentations during the morning:

1.On-Chip Design and Extraction Issues.
Dr. Paul Franzon, North Carolina State University. 

2.On-Chip Inductance in High Speed Integrated Circuits.
Dr. Eby Friedman, University of Rochester. 

3.A General and Comparative Study of RC(0), RC, RCL and RCLK Modeling of Interconnects and their Impact on the Design of Multi-Giga Hertz ICs. 
Dr. Ersed Akcasu, President and CEO, OEA International, Inc. 

OEA International, Inc., the experts in parasitic extraction and analysis tools, has developed three tutorials that will be offered during the afternoon.

Tutorials will cover the following topics:

1.Critical Net Design and Analysis. 

2.On-Chip Inductors and RF Passive Device Design. 

3.Power and Ground Issues for DSM Technologies. 

OEA International, Inc. will be hosting this seminar on March 21, 2002 at Sheraton San Jose Hotel. The one-day format allows for a more focused agenda that we hope will make it easier for designers to attend. Presentation materials will be provided as will breakfast and lunch.

About OEA International, Inc.
OEA International, Inc. designs and licenses state-of-the-art signal integrity software for the electronic computer-aided design (ECAD) industry.   OEA's software is designed to be extremely high performance and handle very complex models with a high degree of accuracy.  OEA products are used to substantially increase engineering productivity and first time success in the design of interconnect and packaging technologies for sophisticated electronic systems and integrated circuits.  For additional information, call 408-778-6747, or visit OEA online at

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